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For voltage-dividers Found Datasheets File :: 3198 Search Time::2.016ms
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				Cypress Semiconductor
Part No.	CY2935011 CY29350AXIT
OCR Text	...escription the cy29350 is a low-voltage high-performance 200-mhz pll-based clock driver designed for high speed clock distribution applicati...dividers allow output to input ra tios of 16:1, 8: 1, 4:1, and 2:1. each lvcmos compatible output ca...
Description	2.5 V or 3.3 V, 200-MHz, 9-Output Clock Driver Nine Clock outputs: Drive up to 18 clock lines
File Size	326.50K / 13 Page	View it Online	Download Datasheet

				SGS Thomson Microelectronics
Part No.	AN431
OCR Text	...o connect the keys by resistive voltage dividers to the converter inputs. An example of key detection using 10 keys is illustrated in this note. Using the Analog to Digital converter in this fashion does not require a static current and avo...
Description	ST6 - USING ST6 ANALOG INPUTS FOR MULTIPLE KEY DECODING
File Size	84.77K / 14 Page	View it Online	Download Datasheet

				PulseCore Semiconductor
Part No.	PCS5P9773G-52-ET PCS5I9773G-52-ER PCS5P9773G-52-ER PCS5I9773G-52-ET
OCR Text	...ription The ASM5I9773 is a low-voltage high-performance does not apply. 200MHz PLL-based zero delay buffer designed for high speed cl...dividers. Master reset and Output enable/disable input. LVCMOS See Table 2. Function Table (Configur...
Description	2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer
File Size	619.13K / 16 Page	View it Online	Download Datasheet

				PulseCore Semiconductor
Part No.	PCS5I9658G-32-LR PCS5I9658G-32-ER
OCR Text	voltage clock generator Supports zero-delay operation 3.3V power supply Generates clock signals up to 250MHz Maximum output skew of 120pS Di...dividers or directly to the outputs. The PLL bypass configurations are fully static and the minimum ...
Description	3.3V 1:10 LVCMOS PLL Clock Generator
File Size	606.63K / 15 Page	View it Online	Download Datasheet

				PulseCore Semiconductor
Part No.	PCS5I9351G-32-LT PCS5I9351G-32-ET
OCR Text	...ut dividers. This mode is fully voltage high performance static and the minimum input clock frequency specification does not apply. Funct...dividers Outputs enabled /2 (Bank A) /4 (Bank B) /4 (Bank C) /4 (Bank D) 1 TCLK PLL enabled. The...
Description	2.5V or 3.3V, 200MHz, 9-Output Zero Delay Buffer
File Size	505.38K / 13 Page	View it Online	Download Datasheet

				PulseCore Semiconductor
Part No.	PCS5I9350G-32-ET PCS5I9350G-32-LT
OCR Text	...ecification does not apply. low-voltage high-performance Functional Description The PCS5I9350 is a 200MHz PLL-based clock driver desi...dividers Outputs enabled Feedback divider /32 /2 (Bank A) /4 (Bank B) /4 (Bank C) /4 (Bank D) 1 ...
Description	3.3V 1:10 LVCMOS PLL Clock Generator
File Size	483.16K / 12 Page	View it Online	Download Datasheet

				美国讯泰微波有限公司上海代表
Part No.	365S8GE
OCR Text	...E-BY-4, DC - 13.0 GHz Output Voltage Waveform, Pin= 0 dBm, Fout= 882 MHz, T= 25 C Absolute Maximum Ratings RF Input (Vcc = +5V) Vcc J...DIVIDERS & DETECTORS - SMT AMPLITUDE (mV) 700 600 500 400 300 200 100 0 -100 -200 -300 -400 -500...
Description	SMT GaAs HBT MMIC DIVIDE-BY-4, DC - 13.0 GHz
File Size	352.87K / 6 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	MC10EL34-D
OCR Text	...BB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential...dividers will only be enabled/disabled when the internal clock is already in the LOW state. This avo...
Description	5V ECL ?, ?, ? Clock Generation Chip
File Size	68.04K / 8 Page	View it Online	Download Datasheet

For voltage-dividers Found Datasheets File :: 3198 Search Time::2.016ms
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