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BCD Semiconductor Manufacturing, Ltd.
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| Part No. |
M395T2953CZ4-CE601
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| OCR Text |
...ts system r unning with dynamic io failure. finally all fb-dimm is connected in daisy chain manner. thus, every inte rconnection between am...link init sm and control and csrs mux lnit patterns ibist - tx ibist - rx failover command decoder &... |
| Description |
128M X 72 DDR DRAM MODULE, DMA240 ROHS COMPLIANT, DIMM-240
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| File Size |
530.77K /
32 Page |
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Intersil, Corp.
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| Part No. |
ISL34341INZ-T13
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| OCR Text |
...gnd_p gnd_an gnd_tx gnd_cdr gnd_io video_tx i2ca0 ref_res gnd_cr gnd_p gnd_an gnd_tx gnd_cdr gnd_io seriop serion seriop serion 27nf 27nf 27...link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the m... |
| Description |
WSVGA 24-Bit Long-Reach Video SERDES with Bi-directional Side-Channel; Temperature Range: -40°C to 85°C; Package: 64-EPTQFP T&R SPECIALTY INTERFACE CIRCUIT, PQFP64
WSVGA 24-Bit Long-Reach Video SERDES with Bi-directional Side-Channel; Temperature Range: -40°C to 85°C; Package: 64-EPTQFP SPECIALTY INTERFACE CIRCUIT, PQFP64
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| File Size |
288.12K /
11 Page |
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ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
SGS Thomson Microelectronics
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| Part No. |
MK5027 4284 MK5027PLCC52 MK5027DIP
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| OCR Text |
... 1: Pin Description. LEGEND:
I IO OD Input only Input/Output O 3S Output only 3-State
Open Drain (no internal pull-up) Pin(s) 2-9 40-47 ...Link Controller (MK5027) device is a VLSI product intended for data communication applications requi... |
| Description |
SS7 SIGNALLING LINK CONTROLLER
From old datasheet system
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| File Size |
181.74K /
19 Page |
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Myson
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| Part No. |
MTD502E
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| OCR Text |
...) (nc) (nc) (nc) 67 vcc * 68~71 io (nc) (nc) (nc) (nc) 72 vcc 73 io (nc) (nc) (nc) (nc) 74 gnd 75,76 io (nc) (nc) (nc) (nc) 77~79 i (nc) (nc...link_activity led display, low_active. * when in link_on state : this led pin is always in low_acti... |
| Description |
2 Port 10M/100M Switch
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| File Size |
216.62K /
20 Page |
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it Online |
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Natinoal Semiconductor
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| Part No. |
LM2502
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| OCR Text |
...AL BUS PINS MD[1:0] MC M/S* PD* IO, MPL IO, MPL I, LVCMOS IO, LVCMOS IO, LVCMOS
CONFIGURATION/PARALLEL BUS PINS
MF0 (E or RD*)
1
...link Transceiver configurable part that supports a 16-bit CPU (68xx or 80xx) style interface. The MP... |
| Description |
Mobile Pixel Link (MPL) Transceiver
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| File Size |
537.69K /
20 Page |
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it Online |
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http://
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| Part No. |
MK50H28DIP MK50H28PLCC52
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| OCR Text |
...l<15:00> 2-9 40-47 [2-10 44-51] io/3s the time multiplexed data/address bus. during the address portion of a memory transfer, dal<15:00> con...link communications controller device is a vlsi product intended for high performance data com- muni... |
| Description |
MULTI LOGICAL LINK FRAME RELAY CONTROLLER
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| File Size |
438.63K /
64 Page |
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it Online |
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Price and Availability
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