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Part No. |
IDT72V3612L20PQF
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OCR Text |
...is reset and is set high by the second low-to-high transition of clka after data is loaded into empty fifo2 memory. efb port b empty flag o ...generation is enabled for a read operation. pefa port a parity error o when any byte applied to term... |
Description |
3.3 VOLT CMOS SyncBiFIFO-TM 64 x 36 x 2
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File Size |
230.81K /
25 Page |
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it Online |
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FREESCALE[Freescale Semiconductor, Inc]
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Part No. |
DSPA56371
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OCR Text |
...-- 181 Million Instructions Per Second (MIPS) with a 181 MHz clock at an internal logic supply (QVDDL) of 1.25V. -- Object Code Compatible w...Generation Unit, Program Controller, DMA Controller, Memory Module Interface, Peripheral Module Inte... |
Description |
The DSP56371 is a high density CMOS device with 5.0-volt compatible inputs and outputs.
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File Size |
1,300.90K /
124 Page |
View
it Online |
Download Datasheet
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Price and Availability
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