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IDT
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| Part No. |
79RC32365
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| OCR Text |
...roviding capabilities such as a prefetch instruction, multiple DSP instructions, and cache locking. The instruction set is largely compatible with the MIPS32 instruction set, allowing the customer to select from a broad range of software an... |
| Description |
Integrated Communications Processor
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| File Size |
457.71K /
44 Page |
 View
it Online |
Download Datasheet
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IDT
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| Part No. |
RC32365
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| OCR Text |
...roviding capabilities such as a prefetch instruction, multiple DSP instructions, and cache locking. The instruction set is largely compatible with the MIPS32 instruction set, allowing the customer to select from a broad range of software an... |
| Description |
Integrated Communications Processor
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| File Size |
470.01K /
44 Page |
View
it Online |
Download Datasheet |
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Motorola
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| Part No. |
MPC859TMPC859DSL MPC866EC
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| OCR Text |
...nch prediction with conditional prefetch, without conditional execution -- 4- or 8-Kbyte data cache and 4- or 16-Kbyte instruction cache (see Table 1-1). - 16-Kbyte instruction cache (MPC866P) is four-way, set-associative with 256 sets;4-Kb... |
| Description |
PowerQUICC™ Integrated Communications Processor
From old datasheet system
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| File Size |
463.37K /
92 Page |
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it Online |
Download Datasheet |
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Actel
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| Part No. |
COREMP7
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| OCR Text |
...red after a data or instruction prefetch abort. System mode is a privileged user mode for the operating system. Undefined mode is entered when an undefined instruction is executed.
Processor Operating States
The CoreMP7 processor has tw... |
| Description |
soft IP core
From old datasheet system
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| File Size |
201.85K /
29 Page |
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it Online |
Download Datasheet |
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Price and Availability
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