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ON Semiconductor
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| Part No. |
NB4N316M
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| OCR Text |
...t signals: lvpecl, cml, lvcmos, lvttl, or lvds. these signals will be translated to cml, operating up to 2.0 ghz or 2.5 gb/s, respectively. as such, the nb4n316m is ideal for sonet, gige, fiber channel, backplane and other clock or data dis... |
| Description |
3.3 V AnyLevel Receiver to CML Driver/Translator with Input Hysteresis - 2.0 GHz Clock / 2.5 Gb/s Data
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| File Size |
185.03K /
12 Page |
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Infineon
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| Part No. |
V23849-R35-C55 V23849-R36-C55
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| OCR Text |
...) 8)
Name
Logic Level N/A LVTTL LVTTL LVTTL LVTTL N/A LVTTL LVTTL N/A N/A N/A LVPECL LVPECL N/A N/A N/A N/A LVPECL LVPECL N/A
Funct...to indicate that the module is present. In accordance to SFF Committee SFF-8079 Draft. A low signal ... |
| Description |
Transceivers by Form-factor MSA - iSFP? 1.25 Gbit/s GBE; 4.25/2.125/1.0625 Gbit/s FC, 850 nm; MM; LC; common ground sheme
Transceivers by Form-factor MSA - iSFP? 1.25 Gbit/s GBE; 4.25/2.125/1.0625 Gbit/s FC, 850 nm; MM; LC; separated ground sheme
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| File Size |
568.47K /
31 Page |
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Download Datasheet |
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Infineon
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| Part No. |
ISFPSMOC-48IRMETAL
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| OCR Text |
...) 7)
Name
Logic Level N/A LVTTL LVTTL LVTTL LVTTL N/A N/A LVTTL N/A N/A N/A LVPECL LVPECL N/A N/A N/A N/A LVPECL LVPECL N/A
Functio...to indicate that the module is present. A low signal indicates normal operation, light is present at... |
| Description |
Transceivers by Form-factor MSA - iSFP Trx for Multirate Applications up to 2.67 Gbit/s, LC Connector, 1300 nm, 15 km
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| File Size |
544.32K /
28 Page |
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it Online |
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Maxim
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| Part No. |
MAX9211 MAX9213 MAX9215 MAX9209
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| OCR Text |
...13/MAX9215 serialize 21 bits of LVTTL/LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization. The MAX9209/MAX9211/MAX9213/MAX9215 feature programmable DC balance, ... |
| Description |
Programmable DC-Balance 21-Bit Serializers
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| File Size |
412.04K /
19 Page |
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it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
IDT8T49N222I
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| OCR Text |
...ullup i 2 c clock input. lvcmos/lvttl interface levels. 19 reserved unused must be left unconnected. 20 s_a1 input pulldown i 2 c address b...to lvds or lvpecl interface levels. 29 oe1 input pullup active high output enable for q1, nq1. 0 = ... |
| Description |
Fourth generation FemtoClock
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| File Size |
697.58K /
40 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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