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  clock-recovery Datasheet PDF File

For clock-recovery Found Datasheets File :: 10264    Search Time::1.313ms    
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    78P2253 78P2253-IGT

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Electronic Theatre Controls, Inc.
Part No. 78P2253 78P2253-IGT
OCR Text ...a PLL to multiply the reference clock to the transmission frequency. The receiver provides adaptive equalization for accurate clock and data recovery. The 78P2253 is built in a BiCMOS technology for high performance and low power operation....
Description Transceiver
XTAL CER SMT 11X5 4PAD 收发
Quad 2.3V 10 MHz OP, I temp, -40C to 85C, 14-SOIC 150mil, TUBE

File Size 112.36K  /  23 Page

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    Agilent (Hewlett-Packard)
Part No. HDMP-1536A HDMP-1546A
OCR Text ...dge of the 106.25 mhz reference clock (used as the transmit byte clock). the transmitter sections pll locks to this user supplied 106.25 mhz...recovery input select frame demux and byte sync input sampler sig_det signal detect 3 output...
Description Fibre Channel Transceiver Chip(光纤通道收发器芯
HDMP-1536A · 1.0625 GBd Fibre Channel 10x10 mm QFP Transceiver Chip (Recommend HDMP-1636A for new designs)

File Size 242.22K  /  16 Page

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    Philips
Part No. TZA3015HW/N1
OCR Text ...ble double data rate (ddr, half clock rate) or single data rate (sdr) clocking scheme on parallel interface, enabling easy interfacing with ...recovery and synthesizer supports any bit rate from 30 mbit/s to 3.2 gbit/s when using i 2 c-bus in...
Description TZA3015HW; 30 Mbit/s to 3.2 Gbit/s A-rate(tm) 4-bit fibre optic transceiver

File Size 325.30K  /  67 Page

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    EBJ41HE4BDFD-AE-F EBJ41HE4BDFD-DJ-F EBJ41HE4BDFM-AE-F EBJ41HE4BDFP-AE-F EBJ41HE4BDFM-DJ-F EBJ41HE4BDFP-DJ-F

Elpida Memory
Part No. EBJ41HE4BDFD-AE-F EBJ41HE4BDFD-DJ-F EBJ41HE4BDFM-AE-F EBJ41HE4BDFP-AE-F EBJ41HE4BDFM-DJ-F EBJ41HE4BDFP-DJ-F
OCR Text ...ecture; two data transfers per clock cycle ? the high-speed data transfer is realized by the 8 bits prefetch pipelined architecture ? ...recovery time (twr) 78h 15ns 78h 15ns 18 sdram minimum /ras to /cas delay (trcd) 69h 13.125n...
Description 4GB Registered DDR3 SDRAM DIMM

File Size 191.20K  /  19 Page

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    Agilent (Hewlett-Packard)
Part No. HDMP-1638
OCR Text ...erial i/o and differential pecl clock inputs hdmp-1638 transceiver technical data features ? ieee 802.3z gigabit ethernet compatible, suppor...recovery ? comma character recognition ? byte alignment circuitry ? serial to parallel converter fig...
Description Gigabit Ethernet Transceiver Chip with Dual Serial I/O and Differential PECL Clock Inputs(带双路串行I/O和差分PECL时钟输入的千兆位以太网收发器)
HDMP-1638 · 1.25 GBd Transceiver Chip with Dual Serial I/O and Differential PECL Clock Inputs for GbE

File Size 250.52K  /  19 Page

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    STMICROELECTRONICS[STMicroelectronics]
Part No. FC106 5990
OCR Text ...arallel Interface Receive Byte Clock REFCLK 10 bits s s s s Direct support for 1.0625 GBaud Fibre Channel (ANSI X3.230-1994...RECOVERY BYTE AND WORD ALIGNEMENT s s s s s s s s s s Integrated Fibre Channel ...
Description From old datasheet system
Fibre Channel Transceiver 1.0625 GBaud

File Size 210.57K  /  32 Page

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    NXP Semiconductors N.V.
Part No. PCA9541PW/01112 PCA9541PW/01118 PCA9541BS/03118 PCA9541BS/03-T PCA9541PW/03112 PCA9541BS/01118 PCA9541BS/01-T PCA9541D/01112
OCR Text ...alization if enabled sends nine clock pulses, a not acknowledge, and a stop condition in order to set the downstream i 2 c-bus devices to an...recovery/initialization procedure is completed. an internal bus sensor senses the downstream i 2 c-b...
Description 2-to-1 I2C-bus master selector with interrupt logic and reset; Package: SOT403-1 (TSSOP16); Container: Tube SPECIALTY MICROPROCESSOR CIRCUIT, PDSO16
2-to-1 I2C-bus master selector with interrupt logic and reset; Package: SOT109-1 (SO16); Container: Tube SPECIALTY MICROPROCESSOR CIRCUIT, PDSO16
2-to-1 I2C-bus master selector with interrupt logic and reset; Package: SOT629-1 (HVQFN16); Container: Reel Pack, SMD, 13&quot;

File Size 204.37K  /  41 Page

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    NXP Semiconductors N.V.
Part No. PCA9541PW/01 PCA9541BS/02 PCA9541PW/03 PCA9541BS/01 PCA9541PW/02
OCR Text ...alization if enabled sends nine clock pulses, a not acknowledge, and a stop condition in order to set the downstream i 2 c-bus devices to an...recovery/initialization procedure is completed. an internal bus sensor senses the downstream i 2 c-b...
Description 2-to-1 I2C-bus master selector with interrupt logic and reset

File Size 192.56K  /  43 Page

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    Exar
Part No. XRT83L30
OCR Text ...t1/e1/j1 lh/sh transceiver with clock recovery and jitter attenuator may 2003 rev. p1.3.0 general description the xrt83l30 is a fully integrated single-channel long-haul and short-haul line interface unit for t1(1.544mbps) 100 w , e1(2.048m...
Description Single-Channel T1/E1/J1 Long-Haul, Short-Haul Line Interface Unit

File Size 415.81K  /  78 Page

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