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ABRACON CORP
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| Part No. |
ABB0210SC-T
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| OCR Text |
...d back to the input of the pll. since the skew between the input and output is less than 350 ps, the device acts as a zero delay buffer. pin configuration block diagram 1 2 3 4 5 6 7 8 refin gnd clk1 ... |
| Description |
0210 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
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| File Size |
48.72K /
6 Page |
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ONSEMI[ON Semiconductor]
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| Part No. |
AN1504 AN1504D
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| OCR Text |
...ta and Regenerative (Figure 5). since the master latch accepts signals from external sources it is the section most susceptible to metastability problems. When the clock signal goes to a high state the current in the master latch clock diff... |
| Description |
Metastability and the ECLinPS Family
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| File Size |
126.65K /
8 Page |
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it Online |
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ONSEMI[ON Semiconductor]
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| Part No. |
CS5421GD16 CS5421GDR16 CS5421
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| OCR Text |
...either line or load conditions, since the ramp signal is generated from the output voltage itself. The V2 method differs from traditional techniques such as voltage mode control, which generates an artificial ramp, and current mode control,... |
| Description |
Dual Out−of−Phase Synchronous Buck Controller with Remote Sense
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| File Size |
295.45K /
14 Page |
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it Online |
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INTERSIL[Intersil Corporation]
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| Part No. |
X926106 X9261US24Z X9261UV24Z X9261 X9261US24 X9261UV24
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| OCR Text |
... on a mechanical potentiometer. since there are 2 potentiometers, there are 2 sets of RH and RL such that RH0 and RL0 are the terminals of POT 0 and so on. RW The wiper pin are equivalent to the wiper terminal of a mechanical potentiometer.... |
| Description |
Dual Digitally-Controlled Potentiometers
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| File Size |
357.03K /
20 Page |
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it Online |
Download Datasheet |
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Price and Availability
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