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ST Microelectronics
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| Part No. |
HCF4027BC1 HCF4027B HCC4027BF
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| OCR Text |
...each flip-flop ; changes in the flipflop state are synchronous with the positive-going transition of the clock pulse. Set and reset functions are independent of the clock and are initiated when a high level signal is present at either the S... |
| Description |
DUAL-J-K MASTER-SLAVE FLIP-FLOP
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| File Size |
289.76K /
13 Page |
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it Online |
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FAIRCHILD[Fairchild Semiconductor]
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| Part No. |
74F534SJ 74F534SC 74F534PC 74F534
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| OCR Text |
...h speed, low-power octal D-type flipflop featuring separate D-type inputs for each flip-flop and 3-STATE outputs for bus-oriented applications. A buffered clock (CP) and Output Enable (OE) are common to all flipflops. The 74F534 is the same... |
| Description |
Octal D-Type Flip-Flop with 3-STATE Outputs
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| File Size |
59.28K /
6 Page |
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it Online |
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Motorola
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| Part No. |
MC88920
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| OCR Text |
...q r d q1 q r d q2 q r d adummyo flipflop to maintain phaselocked operation q r d q3 q r d q/2 q rc1 2 sync input timing requirements symbol...clock period sync input 1 f 2x_q 4 200 ns duty cycle duty cycle, sync input 50% 25% frequency s... |
| Description |
MC88920 Low Skew CMOS PLL clock Driver with Power-Down/Power-Up Feature
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| File Size |
266.31K /
10 Page |
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it Online |
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FAIRCHILD[Fairchild Semiconductor] Fairchild Semiconductor Corporation
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| Part No. |
74VHCT374AMTC 74VHCT374AM 74VHCT374A 74VHCT374ASJ 74VHCT374AN 74VHCT374 74VHCT374AMTCX
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| OCR Text |
... dissipation. This 8-bit D-type flipflop is controlled by a clock input (CP) and an output enable input (OE). When the OE input is HIGH, the eight outputs are in a high impedance state. Protection circuits ensure that 0V to 7V can be applie... |
| Description |
Octal D-Type Flip-Flop with 3-STATE Outputs From old datasheet system Supervisor w/5K Pull-Up Active Low, -40C to 85C, 3-TO-92, BAG
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| File Size |
91.06K /
7 Page |
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it Online |
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