| |
|
 |
Motorola
|
| Part No. |
MC74F544DW MC74F544N MC74F544
|
| OCR Text |
...ata latched l l l l l l l h h l transparent l l h x nc hold h = high voltage level: h = high state must be present one set-up time before the low -to-high transition of lexx or exx (xx = ab or ba): l = low voltage level: l = low state m... |
| Description |
OCTAL REGISTERED TRANSCEIVER / INVERTING / 3-STATE
OCTAL REGISTERED TRANSCEIVER, INVERTING, 3-STATE
|
| File Size |
83.11K /
4 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
LITE-ON Electronics
|
| Part No. |
LTD323 LTD322
|
| OCR Text |
...h are made from algaas on a non-transparent gaas substrate. the bright red and green series devices utilize led chips which are made from gap on a transparent gap substrate. the yellow, red orange series devices utilize led chips which are ... |
| Description |
(LTD322 / LTD323) Dual Digit Numeric LED Displays
|
| File Size |
331.86K /
4 Page |
View
it Online |
Download Datasheet |
| |
|
|
FAIRCHILD[Fairchild Semiconductor]
|
| Part No. |
74F845SPC 74F845 74F845SC
|
| OCR Text |
transparent Latch
April 1988 Revised August 1999
74F845 8-Bit transparent Latch
General Description
The 74F845 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra dat... |
| Description |
8-Bit transparent Latch
|
| File Size |
47.41K /
6 Page |
View
it Online |
Download Datasheet |
| |
|
|
FAIRCHILD[Fairchild Semiconductor]
|
| Part No. |
74F841SPC 74F841 74F841SC
|
| OCR Text |
transparent Latch
March 1988 Revised August 1999
74F841 10-Bit transparent Latch
General Description
The 74F841 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra da... |
| Description |
10-Bit transparent Latch
|
| File Size |
47.15K /
6 Page |
View
it Online |
Download Datasheet |
| |
|
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| Part No. |
74F646_04 74F646 74F646MSA 74F646SC 74F646SPC 74F646MSAX
|
| OCR Text |
...multiplex stored and real-time (transparent mode) data. The direction control determines which bus will receive data when the enable control G is Active LOW. In the isolation mode (control G HIGH), A data may be stored in the B register and... |
| Description |
F/FAST SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 5.30 MM, MO-150, SSOP-24
Octal Transceiver/Register with 3-STATE Outputs
Octal Bus Transceiver and Register with 3-STATE Outputs
|
| File Size |
68.01K /
6 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
