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Winbond Electronics
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Part No. |
W83194R-630
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OCR Text |
...lock outputs which have syn. or asyn. frequencies as cpu clocks. this pin will not be stopped by cpu_stop# sdram0/cpu_stop# 17 i/o sdram clock outputs which have syn. or asyn. frequencies as cpu clocks. cpu_stop# input pin w... |
Description |
166MHz SiS540/630 Clock Gen., 3-DIMM, with S.S.T.
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File Size |
204.38K /
14 Page |
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it Online |
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Infineon
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Part No. |
SAFC164CI-8EMC-STEP
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OCR Text |
...10 txd0 asc0 clock/data output (asyn./syn.) p3.11 rxd0 asc0 data input (asyn.) or i/o (syn.) p3.12 bhe ext. memory high byte enable signal, wrh ext. memory high byte write strobe p3.13 sclk ssc master clock outp./slave cl. inp. p3.15 clkout... |
Description |
16-Bit Microcontrollers - 64 K OTP, 2 K RAM, CAN, Drive Control Unit, 20 MHz
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File Size |
335.98K /
53 Page |
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it Online |
Download Datasheet
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Samsung Electronic
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Part No. |
K4N56163QF-GC25 K4N56163QF-GC30 K4N56163QF-GC37
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OCR Text |
... for self refresh entry. cke is asyn chronous for self refresh exit. cke must be main- tained high throughout read and write acce sses. input buffers, excluding ck, ck and cke are disabled during power-down. input buffe rs, excluding cke, ... |
Description |
256Mbit gDDR2 SDRAM
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File Size |
1,264.03K /
73 Page |
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it Online |
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AMI
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Part No. |
FS6261-01
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OCR Text |
...tion. cpu_stop# can be asserted asyn- chronously, and the stop clock control is glitch-free, in that the cpu clock must complete a full cycle before the clock is stopped low. one rising edge of the pci_f clock is allowed before the cpu and ... |
Description |
Motherboard Clock Generator IC
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File Size |
232.37K /
17 Page |
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it Online |
Download Datasheet
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Price and Availability
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