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ZF Electronics, Corp. ONSEMI[ON Semiconductor]
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Part No. |
CS4161YN8 CS4161 CS4161-D CS4161/D
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OCR Text |
... as specified in the Transition states section. The transition states occur as indicated in Table 1 without any intermediate states permitted.
Table 1. Transition states
State 0 1 2 3 4 5 6 7 Coil A + OFF - - - OFF + + Coil B + + + OFF - ... |
Description |
85 mA Dual H-Bridge Odometer Driver with Divide by Select and UVLO 八十五毫安双H桥驱动器,里程表除以选择和UVLO
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File Size |
55.96K /
8 Page |
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ONSEMI[ON Semiconductor]
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Part No. |
CS8441YN8 CS8441 CS8441-D
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OCR Text |
... as specified in the Transition states section. The transition states occur as indicated in Table 1 without any intermediate states permitted.
Table 1. Transition states
State 0 1 2 3 4 5 6 7 Coil A + OFF - - - OFF + + Coil B + + + OFF - ... |
Description |
Stepper Motor Controller/Driver Stepper Motor Driver with Divide by Select
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File Size |
54.79K /
8 Page |
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it Online |
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CYPRESS[Cypress Semiconductor] Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
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Part No. |
CY7C1350G-250BGI CY7C1350G CY7C1350G-100AXC CY7C1350G-100AXI CY7C1350G-100BGC CY7C1350G-100BGI CY7C1350G-133AXC CY7C1350G-133AXI CY7C1350G-133BGC CY7C1350G-133BGI CY7C1350G-166AXC CY7C1350G-166AXI CY7C1350G-166BGC CY7C1350G-166BGI CY7C1350G-200AXC CY7C1350G-200AXI CY7C1350G-200BGC CY7C1350G-200BGI CY7C1350G-225AXC CY7C1350G-225AXI CY7C1350G-225BGC CY7C1350G-225BGI CY7C1350G-250AXC CY7C1350G-250AXI CY7C1350G-250BGC
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OCR Text |
...s without the insertion of wait states. The CY7C1350G is equipped with the advanced No Bus LatencyTM (NoBLTM) logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle. This feature dramatic... |
Description |
4-Mbit (128K x 36) Pipelined SRAM with NoBL(TM) Architecture Mechanism, 2-inch wide, compact, Easy Load and platen detect Mechanism, 2-inch wide, Hi-speed, compact Easy Load Parallel Mini Interface Board with cutter controller for 6x8MCL35x Mechanism, ELM w/low profile cutter (full or partial cut) Mechanism, 2-inch wide, Hi-speed, compact, rear feed and platen detect 128K X 36 ZBT SRAM, 2.6 ns, PQFP100 Mechanism, 2-inch wide, compact Easy Load, 3V logic 128K X 36 ZBT SRAM, 2.6 ns, PBGA119 4-Mbit (128K x 36) Pipelined SRAM with NoBL Architecture 128K X 36 ZBT SRAM, 4 ns, PBGA119
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File Size |
295.74K /
15 Page |
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CYPRESS[Cypress Semiconductor]
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Part No. |
CY7C1378B-166AC CY7C1378B
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OCR Text |
...s without the insertion of wait states. The CY7C1378B is equipped with the advanced No Bus LatencyTM (NoBLTM) logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle. This feature dramatic... |
Description |
9-Mbit (256K x 32) Pipelined SRAM with NoBL(TM) Architecture 9-Mbit (256K x 32) Pipelined SRAM with NoBL Architecture
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File Size |
245.94K /
14 Page |
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it Online |
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ETC[ETC]
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Part No. |
DR8051XP DR8051 DR8051CPU
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OCR Text |
...rogrammable Program Memory Wait states solution for wide range of memories speed User programmable External Data Memory Wait states solution for wide range of memories speed De-multiplexed Address/Data bus to allow easy connection to memo... |
Description |
From old datasheet system High Performance Configurable 8-bit Microcontroller ver 3.01
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File Size |
98.38K /
7 Page |
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it Online |
Download Datasheet
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Price and Availability
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