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				Actel Corporation
Part No.	MC-ACT-UL2LINK-NET MC-ACT-UL2LINK-VHDL
OCR Text	Link Intended Use: -- ATM Cell Processors -- ATM Switch Fabrics Version 1.0, July 2006 Features: -- Function compatible with ATM Fo...layer and a Physical Layer (PHY) device. The UTOPIA level 2 standard defines a full duplex interface...
Description	Function compatible with ATM Forum af-phy-0017.000 & af-phy-0039.000
File Size	284.74K / 7 Page	View it Online	Download Datasheet

				INTEGRATED DEVICE TECHNOLOGY INC
Part No.	89HPES24N3AZABX
OCR Text	...on options ? automatic per port link width negotiation to x8, x4, x2 or x1 ? automatic lane reversal on all ports ? automatic polarity inver...layer serdes phy logical layer serdes phy logical layer ... multiplexer / demultiplexer 3-port switc...
Description	PCI BUS CONTROLLER, PBGA420
File Size	278.93K / 30 Page	View it Online	Download Datasheet

				Agilent (Hewlett-Packard) HP[Agilent(Hewlett-Packard)]
Part No.	HSDL-1100 HSDL1100 HSDL-1000
OCR Text	...Errorless 4 Mb/s performance at link distances of 1.3-1.95 meters has been verified using the HSDL-1100 and I/O chips such as the National S...Layer Specification. As with the HSDL-1000, several technologies are used in the HSDL1100 design to ...
Description	General Application Guide for the HSDL-1100 4 Mb/s Infrared Transceiver
File Size	43.14K / 6 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS1890 ICS1890Y ICS1890Y-14 ICSXXXXY
OCR Text	...logy capabilities of the remote link partner may be determined and operation automatically adjusted to the highest performance common operat...layer All CMOS, Low power design (<200mA max) Small footprint 64-pin 14mm 2 QFP package ...
Description	10Base-T/100Base-TX Integrated PHYceiver-TM Auto-Negotiation Advertisement Register (register 4 [0x04])
File Size	1,687.32K / 66 Page	View it Online	Download Datasheet

				Actel Corporation
Part No.	MC-ACT-UL3LINK-NET MC-ACT-UL3LINK-VHDL
OCR Text	Link Intended Use: -- Cell Processors -- Switch Fabrics -- Networking -- Telecommunications top_master.vhd top_egr_master.vhd wr_enb wr_d...layer and a Physical Layer (PHY) device. The UTOPIA level 3 standard defines a full duplex interface...
Description	Function compatible with ATM Forum Asynchronous/synchronous FIFO using RAM
File Size	265.46K / 5 Page	View it Online	Download Datasheet

For link-layer Found Datasheets File :: 2979 Search Time::1.641ms
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