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IDT[Integrated Device Technology]
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| Part No. |
IDT72V73273 IDT72V73273BB IDT72V73273DR
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| OCR Text |
...ce state. The RESET pin must be held LOW for a minimum of 20ns to reset the device. This input controls the direction of the data bus lines (D0-D15) during a microprocessor access. This input will select between asynchronous microprocessor ... |
| Description |
32K x 32K Digital Switch with Rate Matching
32k X 32k TSI, 65 I/Oat 2/4/8/16 or 32Mbps, Rate-Matching, 3.3V
3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH WITH RATE MATCHING 32,768 X 32,768 CHANNELS
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| File Size |
304.32K /
37 Page |
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it Online |
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CMLMICRO[CML Microcircuits]
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| Part No. |
MX829P MX829
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| OCR Text |
...rademarks and service marks are held by their respective companies.
Baseband Signal Processor
2
MX829 PRELIMINARY INFORMATION
CONTENTS
Section Page
1. Block Diagram .............................................................. |
| Description |
Baseband Signal Processor
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| File Size |
276.31K /
29 Page |
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it Online |
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Toshiba
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| Part No. |
TC7MH165F TC7MH165FK EA09363
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| OCR Text |
.... When the SHIFT/ LOAD input is held high, the serial data input is enabled and the eight flip-flops perform serial shifting with each clock pulse. Weight: 0.02 g (typ.) When the SHIFT/ LOAD input is held low, the parallel data is loaded sy... |
| Description |
8-Bit Shift Register (P-In, S-Out)
From old datasheet system
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| File Size |
123.00K /
8 Page |
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it Online |
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Microchip
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| Part No. |
93C46B 21172E
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| OCR Text |
..., the internal control logic is held in a RESET status.
After detecting a START condition, the specified number of clock cycles (respectively low to high transitions of CLK) must be provided. These clock cycles are required to clock in a... |
| Description |
1K 5.0V Microwire ? Serial EEPROM
From old datasheet system
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| File Size |
234.14K /
12 Page |
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it Online |
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Price and Availability
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