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flipflop clock Datasheet PDF File

For flipflop clock Found Datasheets File :: 328 Search Time::2.375ms
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				System Logic Semiconductor Co., Ltd. SLS[System Logic Semiconductor]
Part No.	SL74HC161 SL74HC161D SL74HC161N HC161
OCR Text	... and resets the Q output of the flipflop low. Figure 7.Expanded logic diagram SLS System Logic Semiconductor SL74HC161 Sequen...clock fmax guaranteed limits may not apply. Actual performance will depend on number of stages. This...
Description	Presettable Counters
File Size	84.48K / 9 Page	View it Online	Download Datasheet

				IDT
Part No.	IDT74FCT2374AT IDT74FCT2374CT
OCR Text	...es Dx CP Qx Qx OE Description D flipflop data inputs clock Pulse for the register. Enters data on LOW-toHIGH transition 3-State Outputs (TRUE) 3-State Outputs (INVERTED) 3-State Output Enable Input (Active LOW) FUNCTION TABLE(1) Functio...
Description	FAST CMOS OCTAL D REGISTER (3-STATE)
File Size	59.38K / 7 Page	View it Online	Download Datasheet

				XILINX[Xilinx, Inc] Xilinx, Inc.
Part No.	XC7336-7 XC7336-10 XC7336-12 XC7336-15 XC7336-5 XC7336
OCR Text	...t or Set Input to the Macrocell flipflop. The flip-flop can be configured as a D-type or Toggle flip-flop or transparent for combinatorial outputs. The programmable clock source is one of two global FastCLK signals (FCLK0 or FCLK1) that are...
Description	Ultra high-performance EPLD 36-Macrocell CMOS EPLD
File Size	93.28K / 12 Page	View it Online	Download Datasheet

				HITACHI[Hitachi Semiconductor]
Part No.	74HC164 HD74HC164
OCR Text	...er bit is a D-type master/slave flipflop. Inputs A & B permit complete control over the incoming data. A low at either or both inputs inhibi...clock pulse. A high level on the input enables the other input which will then determine the state o...
Description	8-bit Parallel-out Shift Register
File Size	46.54K / 9 Page	View it Online	Download Datasheet

				Fairchild
Part No.	DM74164
OCR Text	... new data, and resets the first flipflop to the LOW level at the next clock pulse, thus providing complete control over incoming data. A HIGH logic level on either input enables the other input, which will then determine the state of the fi...
Description	8-Bit Serial In/Parallel Out Shift Registers From old datasheet system
File Size	51.00K / 4 Page	View it Online	Download Datasheet

				FAIRCHILD[Fairchild Semiconductor]
Part No.	74VCX162374 74VCX162374MTD
OCR Text	...lows applies to each byte. Each flipflop will store the state of their individual I inputs that meet the setup and hold time requirements on the LOW-to-HIGH clock (CPn) transition. With the Output Enable (OEn) LOW, the contents of the flip-...
Description	Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs and 26-Ohm Series Resistors in Outputs Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs and 26ヘ Series Resistors in Outputs Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs and 26 Series Resistors in Outputs Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in Outputs
File Size	81.94K / 7 Page	View it Online	Download Datasheet

				IDT
Part No.	IDT74LVCH16374A 74LVCH16374A_DS_62505
OCR Text	...VCH16374A EDGE-TRIGGERED D-TYPE flipflop WITH 3-STATE OUTPUTS, 5V TOLERANT I/O AND BUS-HOLD * Typical tSK(o) (Output Skew) < 250ps * ESD > ...clock (CLK) controls are organized to operate each device as two 8-bit registers or one 16-bit regis...
Description	3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE flipflop From old datasheet system
File Size	64.23K / 6 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	MC74LCX16374-D
OCR Text	...mance, noninverting 16bit dtype flipflop operating from a 2.3 to 3.6 v supply. the device is byte controlled. each byte has separate output enable and clock pulse inputs. these control pins can be tied together for full 16bit operation. hig...
Description	Low-Voltage CMOS 16-Bit D-Type Flip-Flop With 5 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)
File Size	75.39K / 8 Page	View it Online	Download Datasheet

				IDT
Part No.	IDT74ALVCH16823 74ALVCH16823_DS_66649
OCR Text	... 3.3V CMOS 18-BIT BUS-INTERFACE flipflop WITH 3-STATE OUTPUTS AND BUS-HOLD * 0.5 MICRON CMOS Technology * Typical tSK(o) (Output Skew) < 25...clock-enable (CLKEN) input low, the D-type flip-flops enter data on the low-to-high transitions of t...
Description	3.3V CMOS 18-BIT BUS-INTERFACE flipflop WITH 3-STATE OUTPUTS AND BUS-HOLD From old datasheet system
File Size	67.10K / 7 Page	View it Online	Download Datasheet

For flipflop clock Found Datasheets File :: 328 Search Time::2.375ms
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