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  one-pll Datasheet PDF File

For one-pll Found Datasheets File :: 13902    Search Time::1.891ms    
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    ICS9248-112 ICS9248YF-112-T ICS9248YF-112 ICS9248YF-112LF AV9248F-112

ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
Part No. ICS9248-112 ICS9248YF-112-T ICS9248YF-112 ICS9248YF-112LF AV9248F-112
OCR Text ...lock will acknowledge each byte one at a time. Controller (host) sends a Stop bit How to Read: Controller (host) will send start bit. Controller (host) sends the read address D3 (H) ICS clock will acknowledge ICS clock ...
Description Frequency generator and integrated buffer for Celeron and PII/III
Frequency Generator & Integrated Buffers for Celeron & PII/III⑩
150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48

File Size 383.27K  /  12 Page

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    ICS9248-126 ICS9248YF-126-T ICS9248YF-126LF-T ICS9248F-126-T AV9248F-126-T

ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
Amphenol, Corp.
Part No. ICS9248-126 ICS9248YF-126-T ICS9248YF-126LF-T ICS9248F-126-T AV9248F-126-T
OCR Text ...lock will acknowledge each byte one at a time. Controller (host) sends a Stop bit How to Write: Controller (Host) Start Bit Address D2(H) Dummy Command Code ACK Dummy Byte Count ACK Byte 0 ACK Byte 1 ACK Byte 2 ACK Byte 3 ACK Byte 4 ACK ...
Description Frequency generator and integrated buffer for Celeron and PII/III and K6
Frequency Generator & Integrated Buffers for Celeron & PII/III⑩ & K6
Single Chip, SIS 540/630 System Clock with AMD 533MHz Freq. and Overclocking
Frequency Generator & Integrated Buffers for Celeron & PII/III & K6
150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48
Peripheral IC 外围芯片

File Size 469.51K  /  12 Page

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    ICS9248-157 ICS9248YF-157-T ICS9248YF-157LF-T AV9248F-157-T

ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
INTEGRATED DEVICE TECHNOLOGY INC
Part No. ICS9248-157 ICS9248YF-157-T ICS9248YF-157LF-T AV9248F-157-T
OCR Text ...Hz. * 7 - PCI @3.3V, (including one free running) * 1 - 48MHz, @3.3V fixed. * 2 - REF @3.3V, 14.318MHz. Features: * Up to 140 MHz frequency ...PLL Spread Spectrum Glitch Free Control Logic /4 CPU STOP CPU STOP /2 /3 BUS STOP 2 CPUC...
Description Frequency timing generator for Pentium II system
Two Chip Solution for Pentium II using ALI 1621/1632M Style Chipsets
Frequency Timing Generator for Pentium II Systems
139.65 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 0.209 INCH, SSOP-28

File Size 149.58K  /  11 Page

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    ICS9248-192 ICS9248YG-192-T

Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
http://
Part No. ICS9248-192 ICS9248YG-192-T
OCR Text ...lock will acknowledge each byte one at a time. * Controller (host) sends a Stop bit How to Write: Controller (Host) Start Bit Address D2(H) Dummy Command Code ICS (Slave/Receiver) How to Read: * * * * * * * * Controller (host) will se...
Description Single Chip Clock for Transmeta
Frequency Timing Generator for Transmeta Systems

File Size 102.92K  /  12 Page

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    ICS9248-20 ICS9248F-20 AV9248F-20

ICST[Integrated Circuit Systems]
Part No. ICS9248-20 ICS9248F-20 AV9248F-20
OCR Text ...ffers. X1 This input pin serves one of two functions. When the device is used with a Crystal, X1 acts as the input pin for the reference signal that comes from the discrete crystal. When the device is driven by an external clock signal, X1 ...
Description Pentium/PRO system clock chip
Pentium/ProTM System Clock Chip

File Size 340.17K  /  11 Page

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    ICS9248-39 ICS9248YF-39 AV9248F-39

ICST[Integrated Circuit Systems]
Part No. ICS9248-39 ICS9248YF-39 AV9248F-39
OCR Text ...IOAPIC output powered by VDDL1. One 48 MHz for USB, and one 24 MHz clock for Super IO. Spread Spectrum built in at 0.5% or 0.25% modulation ...PLL core VDD4 = 24MHz, 48MHz VDDL1 = IOAPIC VDDL2 = CPUCLK 1, CPUCLK_F Pentium is a trademark of In...
Description Frequency generator and integrated for Pentium/PRO
Frequency Generator & Integrated Buffers for PENTIUM/ProTM
Integrated Circuit Systems

File Size 290.92K  /  16 Page

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    ICS9248-50 ICS9248YG-50-T ICS9248YG-50LF-T

Integrated Device Technology, Inc.
ICST[Integrated Circuit Systems]
Part No. ICS9248-50 ICS9248YG-50-T ICS9248YG-50LF-T
OCR Text ... PCI (3.3V) @ 33.3MHz (Includes one free running). - 2 REF clks (3.3V) at 14.318MHz. Skew characteristics: - CPU - CPU<175ps - PCI - PCI < 5...PLL core VDDREF, GNDREF = REF(0:1), X1, X2 VDDPCI, GNDPCI = PCICLK_F, PCICLK (0:4) VDD48, GND48 = 48...
Description 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 6.10 MM, 0.65 MM PITCH, TSSOP-28
Frequency Timing Generator for Pentium II Systems 频率的奔腾II系统时序发生

File Size 260.46K  /  11 Page

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    ICS9248-55 ICS9248BF-55

ICST[Integrated Circuit Systems]
http://
Part No. ICS9248-55 ICS9248BF-55
OCR Text ...lock on latency cycles are only one rising PCICLK. Clock off latency is one PCICLK clock. Notes: 1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS9248 device.) 2. PCI_STOP# is an asynchronous input, and metast...
Description Pentium/Pro/IITM System Clock Chip 奔腾/专业/ IITM系统时钟芯片
BX Main Clock, Supports 66.6 - 100MHz

File Size 268.23K  /  10 Page

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    ICS9248-56 ICS9248YG-56-T ICS9248YG-56LF-T ICS9248F-56

TE Connectivity, Ltd.
Integrated Device Technology, Inc.
ICST[Integrated Circuit Systems]
Part No. ICS9248-56 ICS9248YG-56-T ICS9248YG-56LF-T ICS9248F-56
OCR Text ...6 PCI(3.3V) @ 33.3MHz (Includes one free running). - 1 REF clks (3.3V) at 14.318MHz. - 1 Fixed clock at 48MHz - 1 Fixed clock at 48 or 24MHz...PLL core VDDREF, GNDREF = REF(0:1), X1, X2 VDDPCI, GNDPCI = PCICLK_F, PCICLK (0:4) VDD48, GND48 = 48...
Description Peripheral IC 外围芯片
100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 4.40 MM, 0.65 MM PITCH, TSSOP-28
20-Bit Buffers/Drivers With 3-State Outputs 56-TSSOP -40 to 85
Frequency Generator & Integrated Buffers
Frequency Timing Generator for Pentium II Systems
BX Mobile Main Clock with Real Time Spread, Supports 66.6 - 100MHz

File Size 262.48K  /  11 Page

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    ICS9248-65 ICS9248YF-65 9248YF-65

Integrated Device Technology, Inc.
ICST[Integrated Circuit Systems]
Part No. ICS9248-65 ICS9248YF-65 9248YF-65
OCR Text ...LOW state may require more than one clock cycle to complete. Notes: 1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS9248 device). 2. As shown, the outputs Stop Low on the next falling edge after PD# goes low....
Description PROC SPECIFIC CLOCK GENERATOR, PDSO48 SSOP-48
20-Bit Buffers/Drivers With 3-State Outputs 56-TSSOP -40 to 85
Frequency Generator & Integrated Buffers
Frequency Timing Generator for PENDIUM II Systems
820 Single Chip Clock, Supports 100 - 133MHz

File Size 263.77K  /  10 Page

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For one-pll Found Datasheets File :: 13902    Search Time::1.891ms    
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