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clock-recovery Datasheet PDF File

For clock-recovery Found Datasheets File :: 10265 Search Time::2.219ms
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				Power Integrations Inc Power Integrations, Inc.
Part No.	TOP224Y TOP227Y TOP223Y TOP221Y TOP222Y TOP226Y TOP225Y TOP222P
OCR Text	... S R Q Q OSCILLATOR DMAX CLOCK SAW CONTROLLED TURN-ON GATE DRIVER + PWM COMPARATOR S R Q Q LEADING EDGE BLANKING MINI...recovery time will not cause premature termination of the switching pulse. The current limit can be ...
Description	Three-terminal Off-line PWM Switch
File Size	469.52K / 20 Page	View it Online	Download Datasheet

				NEC[NEC]
Part No.	UPD98402A UPD98402AGM UPD98402AGM-KED
OCR Text	...PLICATION DATA I/F (UTOPIA) CLOCK RECOVERY CHIP Rx PMD TO HUB Tx PMD CONTROL MEMORY PD98401A m SAR CHIP PD98402A m PHY CHIP CNT I/F 155.52MHz HOST BUS I/F SYNTHESIZER HOST BUS HUB APPLICATION (NIC SIDE) DATA I/F ...
Description	LOCAL ATM SONET FRAMER
File Size	174.07K / 26 Page	View it Online	Download Datasheet

				NEC[NEC]
Part No.	UPD98404 UPD98404GJ-KEU
OCR Text	...n addition, this LSI includes a clock recovery function that extracts a reception sync clock from bit streams in received data and a clock synthesis function that generates a clock for transmissions. Detailed function descriptions are provi...
Description	ADVANCED ATM SONET FRAMER
File Size	193.82K / 36 Page	View it Online	Download Datasheet

				NEC[NEC]
Part No.	UPD98405 UPD98405GL-PMU
OCR Text	...ONET/SDH 155-Mbps framer, and a clock recovery circuit and supports an ABR function in hardware. The PD98405 conforms to ATM Forum and has the functions of the AAL-5 SAR sublayer, ATM layer, and TC sublayer. FEATURES * Conforms to ATM F...
Description	155M ATM INTEGRATED SAR CONTROLLER
File Size	323.42K / 64 Page	View it Online	Download Datasheet

				NEC[NEC]
Part No.	UPD98411 UPD98411GN-MMU
OCR Text	...ddition, the PD98411 also has a clock recovery function for each port to extract synchronous clock for reception of receive data from the bit stream, and a clock synthesis function to generate a clock for transmission. For the details of fu...
Description	ATM QUAD SONET FRAMER
File Size	709.29K / 36 Page	View it Online	Download Datasheet

				Fairchild Semiconductor
Part No.	74ACTQ273 74ACTQ273MTC 74ACTQ273PC 74ACTQ273SC 74ACTQ273SJ 74ACTQ273CW
OCR Text	... Q outputs. The common buffered Clock (CP) and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously. The register is...Recovery Time MR to CP Note 8: Voltage Range 5.0 is 5.0V 0.5V TA = +25C CL = 50 pF Typ 1.0 -0.5...
Description	Quiet Series Octal D Flip-Flop Quiet Series Octal D-Type Flip-Flop
File Size	105.69K / 9 Page	View it Online	Download Datasheet

				Fairchild Semiconductor, Corp. FAIRCHILD[Fairchild Semiconductor]
Part No.	74F161APC 74F161ASC 74F161ASJ 74F163APC 74F163ASC 74F163ASJ
OCR Text	...reset on the rising edge of the clock. The 74F161A and 74F163A are highspeed versions of the 74F161 and 74F163. Features s Synchronous c...Recovery Time MR to CP (74F161A) 6.0 6.0 6.0 ns 5.0 5.0 2.0 2.0 11.0 8.5 2.0 0 11.0 5.0 0 0 5.0 5.0 ...
Description	Synchronous Presettable Binary Counter F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDIP16
File Size	70.56K / 7 Page	View it Online	Download Datasheet

				FAIRCHILD[Fairchild Semiconductor]
Part No.	74LCX112 74LCX112M 74LCX112MTC 74LCX112SJ 74LCX112CW
OCR Text	...endent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs. These devices are edge sensitive and change state on the negative going tran...Recovery Time Output to Output Skew (Note 4) Min 150 1.5 1.5 1.5 1.5 2.5 1.5 3.3 3.3 2.0 1.0 ns 1.0 ...
Description	Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
File Size	76.78K / 8 Page	View it Online	Download Datasheet

				Fairchild Semiconductor, Corp. FAIRCHILD[Fairchild Semiconductor]
Part No.	74LCX162244 74LCX162244GX 74LCX162244MEA 74LCX162244MTD 74LCX162244MTDX 74LCX162244MEAX
OCR Text	...as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble has separat...Recovery Time for Logic 3-STATE Output Low Enable and Disable Times for Logic FIGURE 2. Waveforms...
Description	Low Voltage 16-Bit Buffer/Line Driver with 26з Series Resistors in Outputs LVC/LCX/Z SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 Quad 4-Bit Buffer/Driver LVC/LCX/Z SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 From old datasheet system Low Voltage 16-Bit Buffer/Line Driver with 26 Series Resistors in Outputs Low Voltage 16-Bit Buffer/Line Driver with 26-Ohm Series Resistors in Outputs Low Voltage 16-Bit Buffer/Line Driver with 26 Ohm Series Resistors in Outputs
File Size	109.30K / 10 Page	View it Online	Download Datasheet

For clock-recovery Found Datasheets File :: 10265 Search Time::2.219ms
Page :: | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | <10> | 11 | 12 | 13 | 14 | 15 |